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74LV123DB,112 Просмотр технического описания (PDF) - NXP Semiconductors.

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74LV123DB,112 Dual retriggerable monostable multivibrator with reset NXP
NXP Semiconductors. NXP
74LV123DB,112 Datasheet PDF : 24 Pages
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NXP Semiconductors
74LV123
Dual retriggerable monostable multivibrator with reset
Table 9. Test data
Supply voltage
Input
VCC
< 2.7 V
2.7 V to 3.6 V
VI
VCC
2.7 V
4.5 V
VCC
tr, tf
2.5 ns
2.5 ns
2.5 ns
Load
CL
50 pF
50 pF
50 pF
RL
1 k
1 k
1 k
12. Application information
Test
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
12.1 Timing components
12.1.1 Basic timing
The basic output pulse width is essentially determined by the values of the external timing
components REXT and CEXT.
(1) CEXT
REXT
VCC
GND nCEXT nREXT/CEXT
8
14 (6) 15 (7)
74LV123
nA
1 (9)
nB
2 (10)
13 (5)
nQ
4 (12)
nQ
3 (11)
nRD
001aae525
(1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT)
externally to pin 8 (GND).
Fig 9. Timing components connections
If CEXT > 10 nF, the following formula is valid: tW = K REXT CEXT (typ.) where:
tW = output pulse width in ns
REXT = external resistor in k
CEXT = external capacitor in pF
K = constant: this is 0.45 for VCC = 5.0 V and 0.48 for VCC = 2.0 V (see Figure 10)
The inherent test jig and pin capacitance at pin 15 and pin 7 (nREXT/CEXT) is
approximately 7 pF.
74LV123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
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