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FDC37C669-MT View Datasheet(PDF) - SMSC -> Microchip

Part NameDescriptionManufacturer
FDC37C669-MT PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support SMSC
SMSC -> Microchip SMSC
FDC37C669-MT Datasheet PDF : 162 Pages
First Prev 31 32 33 34 35 36 37 38 39 40 Next Last
Model 30 Mode
7
6
5
4
3
2
1
0
DSK
0
0
0 DMAEN NOPREC DRATE DRATE
CHG
SEL1 SEL0
RESET N/A
0
0
0
0
0
1
0
COND.
BITS 0 - 1 DATA RATE SELECT
These bits control the data rate of the floppy controller.
See Table 13 for the settings corresponding to the
individual data rates. The data rate select bits are
unaffected by a software reset, and are set to 250kb/s
after a hardware reset.
BIT 2 NOPREC
This bit reflects the value of NOPREC bit set in the CCR
register.
BIT 3 DMAEN
This bit reflects the value of DMAEN bit set in the DOR
register bit 3.
BITS 4 - 6 UNDEFINED
Always read as a logic "0"
BIT 7 DSKCHG
This bit monitors the pin of the same name and reflects
the opposite value seen on the pin.
32
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