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FDC37C669-MT View Datasheet(PDF) - SMSC -> Microchip

Part NameDescriptionManufacturer
FDC37C669-MT PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support SMSC
SMSC -> Microchip SMSC
FDC37C669-MT Datasheet PDF : 162 Pages
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STATUS REGISTER B (SRB)
Address F1 READ ONLY
This register is read-only and monitors the state of
several disk interface pins, in PS/2 and Model
30 modes. The SRB can be accessed at any time when
in PS/2 mode. In the PC/AT mode the data bus pins D0 -
D7 are held in a high impedance state for a read of
address 3F1.
PS/2 Mode
7
1
RESET 1
COND.
6
5
4
3
2
1
0
1 DRIVE WDATA RDATA WGATE MOT MOT
SEL0 TOGGLE TOGGLE
EN1 EN0
1
0
0
0
0
0
0
BIT 0 MOTOR ENABLE 0
Active high status of the MTR0 disk interface output pin.
This bit is low after a hardware reset and unaffected by a
software reset.
BIT 1 MOTOR ENABLE 1
Active high status of the MTR1 disk interface output pin.
This bit is low after a hardware reset and unaffected by a
software reset.
BIT 2 WRITE GATE
Active high status of the WGATE disk interface output.
BIT 3 READ DATA TOGGLE
Every inactive edge of the RDATA input causes this bit to
change state.
BIT 4 WRITE DATA TOGGLE
Every inactive edge of the WDATA input causes this bit to
change state.
BIT 5 DRIVE SELECT 0
Reflects the status of the Drive Select 0 bit of the DOR
(address 3F2 bit 0). This bit is cleared after a hardware
reset, it is unaffected by a software reset.
BIT 6 RESERVED
Always read as a logic "1".
BIT 7 RESERVED
Always read as a logic "1".
21
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