LPC47N227-MN View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
LPC47N227-MN Datasheet PDF : 202 Pages
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BIT 6 MOTOR ENABLE 2
The MTR2 disk interface output is not supported.
BIT 7 MOTOR ENABLE 3
The MTR3 disk interface output is not supported.
DRIVE
0
1
DOR VALUE
1CH
2DH
Table 3 – Internal 2 Drive Decode (Normal)
DIGITAL OUTPUT
DRIVE SELECT OUTPUTS MOTOR ON OUTPUTS
REGISTER
(ACTIVE LOW)
(ACTIVE LOW)
Bit 5 Bit 4 Bit1 Bit 0
nDS1
nDS0
nMTR1
nMTR0
X
1
0
0
1
0
nBIT 5
nBIT 4
1
X
0
1
0
1
nBIT 5
nBIT 4
0
0
X
X
1
1
nBIT 5
nBIT 4
Table 4 – Internal 2 Drive Decode (Drives 0 and 1 Swapped)
DIGITAL OUTPUT
DRIVE SELECT OUTPUTS MOTOR ON OUTPUTS
REGISTER
(ACTIVE LOW)
(ACTIVE LOW)
Bit 5 Bit 4 Bit1 Bit 0
nDS1
nDS0
nMTR1
nMTR0
X
1
0
0
0
1
nBIT 4
nBIT 5
1
X
0
1
1
0
nBIT 4
nBIT 5
0
0
X
X
1
1
nBIT 4
nBIT 5
Tape Drive Register (TDR)
Address 3F3 READ/WRITE
The Tape Drive Register (TDR) is included for 82077 software compatibility and allows the user to assign
tape support to a particular drive during initialization. Any future references to that drive automatically
invokes tape support. The TDR Tape Select bits TDR.[1:0] determine the tape drive number. Table 5
illustrates the Tape Select Bit encoding. Note that drive 0 is the boot device and cannot be assigned tape
support. The remaining Tape Drive Register bits TDR.[7:2] are tristated when read. The TDR is
unaffected by a software reset.
TAPE SEL1
(TDR.1)
0
0
1
1
Table 5 – Tape Select Bits
TAPE SEL0
DRIVE SELECTED
(TDR.0)
0
None
1
1
0
2
1
3
Note: The LPC47N227 supports one floppy drive directly on the FDC interface pins and two floppy drives
on the Parallel Port.
Normal Floppy Mode
26
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