QFP
PIN
NO.
94
NAME
Drive 2
Address X
Interrupt
Request B
23
DESCRIPTION OF PIN FUNCTIONS
SYMBOL
DRV2
nADRX
IRQ_B
IRQIN
IRMode/
IRR3
BUFFER
TYPE
I
DESCRIPTION
In PS/2 mode, this input indicates
whether a second drive is connected;
DRV2 should be low if a second drive is
connected. This status is reflected in a
read of Status Register A.
OD24
Active low address decode out, used to
decode a 1, 8, or 16 byte address block.
(An external pull-up is required). Refer to
Configuration registers CR03, CR08 and
CR09 for more information. This pin has
a 30 ua internal pull-up.
024
The interrupt request from a logical
device or IRQIN may be output on
IRQ_B. Refer to the configuration
registers for more information.
(OD24)
I/O8
I/O8
(If EPP or ECP Mode is enabled, this
output is pulsed low, then released to
allow sharing of interrupts.)
This pin is used to steer an interrupt
signal from an external device onto one
of eight IRQ outputs IRQA-H.
IR Mode pin or second IR receive pin for
Fast IR.
14