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11525-801 View Datasheet(PDF) - AMI Semiconductor

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Description
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11525-801 Datasheet PDF : 26 Pages
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April 1999
5.0 Spread Spectrum Modulation
To limit peak EMI emissions, high-speed motherboard
designs now require the reduction of the peak harmonic
energy contained in the system bus frequencies. A re-
duction in the peak energy of a specific frequency can be
accomplished by spreading the energy over a limited
range of frequencies through a technique known as
spread spectrum clocking. In this technique, a generated
clock frequency is dithered in a tightly controlled sweep
near the clock frequency using a predetermined modula-
tion profile and period.
Figure 5: Spectral Energy Distribution
spread-
spectrum
clock
E
(1-δ)fnom
non-spread
clock
fnom
The amount of EMI reduction is directly related to three
parameters: the modulation percentage, the frequency of
the modulation, and the modulation profile.
5.1 Modulation Percentage
The modulation percentage δ, is typically 0.5% of the
center frequency (denoted here as fnom). The modulation
percentage determines the range of frequencies the
spectral energy is distributed over. For a 100MHz clock
frequency, a ±0.5% modulation sweeps the clock fre-
quency between 99.5MHz and 100.5MHz. If the sweep is
symmetrical around the center frequency, the technique
is known as center-spread modulation. However, a circuit
that is designed for a 100MHz reference may not have
enough timing margin to support a clock greater then
100MHz. The clock frequency can instead be modulated
between fnom, and (1-δ) fnom,; the technique is known as
down-spread modulation. For a δ of –0.5%, the clock will
sweep between 99.5MHz and 100MHz. A small degrada-
tion in circuit performance may be noticed, as the clock
frequency now averages 99.75MHz.
5.2 Modulation Frequency
The frequency of modulation, noted as fm, describes how
fast the center frequency sweeps between fnom, and (1-δ)
fnom,. Typical modulation frequencies must be greater
than 30kHz (above the audio band) but small enough to
not upset system timing. Since a tracking PLL cannot
instantaneously update the output clock to match a
modulated input clock, any accumulation of the difference
in phase between the modulated input clock and a track-
ing PLL output clock is called tracking skew. The result-
ing phase error will decrease the timing margins in any
successive circuitry.
5.3 Modulation Profile
The modulation profile determines the shape of the
spectral energy distribution by defining the time that the
clock spends at a specific frequency. The longer a clock
remains at a specific frequency, the larger the energy
concentration at that frequency. A sinusoidal modulation
spends a large portion of time between fnom, and (1-δ)
fnom, resulting in large energy peaks at the edges of the
spectral energy distribution. A linear modulation, such as
a triangle profile, improves the spectral distribution but
also exhibits energy peaking at the edges. A non-linear
modulation profile, known as the “Hershey Kiss” profile
and patented by Lexmark International, Inc., offers the
best distribution of spectral energy.
Figure 6: Modulation Profiles
fnom
fnom
time
time
(1-δ)fnom
1/fm
(1-δ)fnom
1/fm
The type of modulation profile used will also impact
tracking skew. The maximum frequency change occurs at
the profile limits where the modulation changes the slew
rate polarity. To track the sudden reversal in clock fre-
quency, the downstream PLL must have a large loop
bandwidth.
4.5.99
,62
6
 

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