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ISPLSI2128VL-135LT100 View Datasheet(PDF) - Lattice Semiconductor

Part NameDescriptionManufacturer
ISPLSI2128VL-135LT100 2.5V In-System Programmable SuperFAST™ High Density PLD Lattice
Lattice Semiconductor Lattice
ISPLSI2128VL-135LT100 Datasheet PDF : 17 Pages
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Specifications ispLSI 2128VL
Signal Descriptions
Signal Name
RESET
GOE 0, GOE1
Y0, Y1, Y2
BSCAN
TDI/IN 0
TCK/IN 3
TMS/IN 1
TDO/IN 2
IN 4 - IN 7
GND
VCC
NC1
I/O
Description
Active Low (0) Reset pin resets all the registers in the device.
Global Output Enable input pins.
Dedicated Clock Input These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
Input Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input This pin performs two functions. When BSCAN is logic low, it functions as a serial data input pin
to load programming data into the device. When BSCAN is high, it functions as a dedicated input pin.
Input This pin performs two functions. When BSCAN is logic low, it functions as a clock pin for the
Boundary Scan state machine. When BSCAN is high, it functions as a dedicated input pin.
Input This pin performs two functions. When BSCAN is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When BSCAN is high, it functions as a dedicated input pin.
Output/Input This pin performs two functions. When BSCAN is logic low, it functions as an output pin
to read serial shift register data. When BSCAN is high, it functions as a dedicated input pin.
Dedicated Input Pins to the device.
Ground (GND)
Vcc
No Connect
Input/Output Pins These are the general purpose I/O pins used by the logic array.
1. NC pins are not to be connected to any active signals, VCC or GND.
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