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CA3059 View Datasheet(PDF) - Intersil

Part NameCA3059 Intersil
Intersil Intersil
DescriptionZero-Voltage Switches for 50Hz-60Hz and 400Hz Thyristor Control Applications
CA3059 Datasheet PDF : 12 Pages
First Prev 11 12
CA3059, CA3079
Operating Considerations
Power Supply Considerations for CA3059 and CA3079
The CA3059 and CA3079 are intended for operation as self-
powered circuits with the power supplied from and AC line
through a dropping resistor. The internal supply is designed
to allow for some current to be drawn by the auxiliary power
circuits. Typical power supply characteristics are given in
Figures 2(b) and 2(c).
Power Supply Considerations for CA3059
The output current available from the internal supply may not
be adequate for higher power applications. In such applica-
tions an external power supply with a higher voltage should
be used with a resulting increase in the output level. (See
Figure 4 for the peak output current characteristics.) When
an external power supply is used, Terminal 5 should be con-
nected to Terminal 7 and the synchronizing voltage applied
to Terminal 12 as illustrated in Figure 5(a).
Operation of Built-In Protection for the CA3059
A special feature of the CA3059 is the inclusion of a protec-
tion circuit which, when connected, removes power from the
load if the sensor either shorts or opens. The protection cir-
cuit is activated by connecting Terminal 14 to Terminal 13 as
shown in the Functional Block Diagram. To assure proper
operation of the protection circuit the following conditions
should be observed:
1. Use the internal supply and limit the external load current
to 2mA with a 5kdropping resistor.
2. Set the value of RP and sensor resistance (RX) between
2kand 100k.
3. The ratio of RX to RP, typically, should be greater than
0.33 and less than 3. If either of these ratios is not met
with an unmodified sensor over the entire anticipated
temperature range, then either a series or shunt resistor
must be added to avoid undesired activation of the circuit.
If operation of the protection circuit is desired under condi-
tions other than those specified above, then apply the data
given in Figure 12.
External Inhibit Function for the CA3059
A priority inhibit command may be applied to Terminal 1. The
presence of at least +1.2V at 10µA will remove drive from
the thyristor. This required level is compatible with DTL or
T2L logic. A logical 1 activates the inhibit function.
DC Gate Current Mode for the CA3059
Connecting Terminals 7 and 12 disables the zero-crossing
detector and permits the flow of gate current on demand
from the differential sensing amplifier. This mode of opera-
tion is useful when comparator operation is desired or when
inductive loads are switched. Care must be exercised to
avoid overloading the internal power supply when operating
in this mode. A sensitive gate thyristor should be used with a
resistor placed between Terminal 4 and the gate in order to
limit the gate current.
Dimensions in parentheses are in millimeters and are derived from The photographs and dimensions represent a chip when it is par of
the basic inch dimensions as indicated. Grid gradations are in mils the wafer. When the wafer is cut into chips, the cleavage angles are
(10-3 inch).
57o instead of 90o with respect to the face of the chip. Therefore, the
isolated chip is actually 7 mils (0.17mm) larger in both dimensions.
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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