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DAC8043AEP View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
DAC8043AEP Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
DAC8043A
SRI
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
CLK
t LD1
LD
SRI
CLK
LD
FS
VOUT
ZS
t ASB
DATA LOADED MSB(D11) FIRST
Dxx
tDS tDH
t CL
t CH
DAC REGISTER LOAD
t LD
tS
؎1 LSB
ERROR BAND
Figure 2. Timing Diagram
Table I. Control-Logic Truth Table
CLK LD Serial Shift Register Function
DAC Register Function
u
H
H or L L
L
u
Shift-Register-Data Advanced One Bit Latched
No Effect
Updated with Current Shift Register Contents
No Effect
Latched All 12 Bits
NOTES
u positive logic transition.
The DAC Register LD input is level-sensitive. Any time LD is logic-low data in the serial register will directly control the
switches in the R-2R DAC ladder.
Typical Performance Characteristics
35
SS = 200 UNITS
30
TA = 25؇C
VDD = 5V
VREF = 10V
25
20
15
10
5
0
–1.0
–0.5
0.0
0.5
1.0
TOTAL UNADJUSTED ERROR – LSB
Figure 3. Total Unadjusted Error Histogram
50
SS = 200 UNITS
TA = –40؇C TO +85؇C
40
VDD = 5V
VREF = 10V
30
20
10
00
1
2
FULL SCALE TEMPCO – ppm/؇C
Figure 4. Full-Scale Output Tempco Histogram
–4–
REV. B
 

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