AD7708BR-REEL7 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD7708BR-REEL7

8-/10-Channel, Low Voltage, Low Power, Σ-∆ ADCs

Analog Devices 

AD7708/AD7718

Pin No Mnemonic

1

AIN7

2

AIN8

3

AVDD

4

AGND

5

REFIN1(–)

6

REFIN1(+)

7

AIN1

8

AIN2

9

AIN3

10

AIN4

11

AIN5

12

AINCOM

13

REFIN2(+)/AIN9

14

REFIN2(–)/AIN10

15

AIN6

16

P2

17

AGND

18

P1

19

RESET

20

SCLK

PIN FUNCTION DESCRIPTIONS

Function

Analog Input Channel 7. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the positive input of a fully-differential input

pair when used with AIN8. (See ADC Control Register section.)

Analog Input Channel 8. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the negative input of a fully-differential input

pair when used with AIN7. (See ADC Control Register section.)

Analog Supply Voltage

Analog Ground

Negative Reference Input. This reference input can lie anywhere between AGND and AVDD – 1 V.

Positive reference input. REFIN(+) can lie anywhere between AVDD and AGND. The nominal

reference voltage [REFIN(+)–REFIN(–)] is 2.5 V but the part is functional with a reference

range from 1 V to AVDD.

Analog Input Channel 1. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the positive input of a fully-differential input

pair when used with AIN2. (See ADC Control Register Section.)

Analog Input Channel 2. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the negative input of a fully-differential input

pair when used with AIN1. (See ADC Control Register section.)

Analog Input Channel 3. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the positive input of a fully-differential input

pair when used with AIN4. (See ADC Control Register section.)

Analog Input Channel 4. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the negative input of a fully-differential input

pair when used with AIN3. (See ADC Control Register section.)

Analog Input Channel 5. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the positive input of a fully-differential input

pair when used with AIN6. (See ADC Control Register section ADCCON.)

All analog inputs are referenced to this input when configured in pseudo-differential input mode.

Positive reference input/analog input. This input can be configured as a reference input with the

same characteristics as REFIN1(+) or as an additional analog input. When configured as an

analog input this pin provides a programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the positive input of a fully-differential input

pair when used with AIN10. (See ADC Control Register section.)

Negative reference input/analog input. This pin can be configured as a reference or analog input.

When configured as a reference input it provides the negative reference input for REFIN2.

When configured as an analog input it provides a programmable-gain analog input that can be

used as a pseudo-differential input when used with AINCOM, or as the negative input of a fully-

differential input pair when used with AIN9. (See ADC Control Register section.)

Analog Input Channel 6. Programmable-gain analog input that can be used as a pseudo-

differential input when used with AINCOM, or as the negative input of a fully-differential input

pair when used with AIN5. (See ADC Control Register section.)

P2 can act as a general-purpose Input/Output bit referenced between AVDD and AGND. There

is a weak pull-up to AVDD internally on this pin.

It is recommended that this pin be tied directly to AGND.

P1 can act as a general-purpose Input/Output bit referenced between AVDD and AGND. There

is a weak pull-up to AVDD internally on this pin.

Digital input used to reset the ADC to its power-on-reset status. This pin has a weak pull-up

internally to DVDD.

Serial clock input for data transfers to and from the ADC. The SCLK has a Schmitt-trigger

input making an opto-isolated interface more robust. The serial clock can be continuous with all

data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous clock

with the information being transmitted to or from the AD7708/AD7718 in smaller batches of data.

–12–

REV. 0

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