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NE1617DS View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
NE1617DS Datasheet PDF : 16 Pages
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Philips Semiconductors
Temperature monitor for microprocessor systems
Product specification
NE1617
SMBUS INTERFACE AC SPECIFICATIONS
VDD = 3.0V to 3.6V; Tamb = 0_C to +125_C unless otherwise noted.
These specifications are guaranteed by design and not tested in production.
SYMBOL
PARAMETER
CONDITIONS
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VIH
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VIL
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IOL
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IIH & IIL
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ CIN
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ fSCLK
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tLOW
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tHIGH
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tBUF
Logic input high voltage for STBY, SCLK, SDATA
Logic input low voltage for STBY, SCLK, SDATA
Logic output low sink current for
ALERT
SDATA
Logic input current
SMBus input capacitance for SCLK,SDATA
SCLK operating frequency
SCLK low time
SCLK high time
SMBus free time.
Delay from SDA stop to SDA start
VDD=3V to 5.5V
VDD=3v to 5.5V
VOL= 0.4V
VOL=0.6V
VIN=VDD or GND
See Figure 3
See Figure 3
See Figure 3
See Figure 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tHD:STA
Hold time of start condition.
Delay from SDA start to first SCL H–L
See Figure 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tHD:DAT
Hold time of data.
Delay from SCL H–L to SDA edges
See Figure 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tSU:DAT
Setup time of data.
Delay from SDA edges to SCL L–H
See Figure 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tSU:STA
Setup time of repeat start condition.
Delay from SCL L–H to restart SDA
See Figure 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tSU:STO
Setup time of stop condition.
Delay from SCL L–H to SDA stop.
See Figure 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tF
Fall time of SCL & SDA
See Figure 3
MIN
TYP
2.2
1.0
6.0
–1.0
5
0
4.7
5.0
4.0
5.0
4.7
4.0
0
250
250
4.0
MAX
0.8
1.0
100
1.0
UNIT
V
V
mA
mA
µA
pF
kHz
µS
µS
µS
µS
ns
ns
ns
µS
µS
tLOW
tR
tF
tHD:STA
SCLK
tHD:STA
tHD:DAT
tHIGH
tSU:DAT
tSU:STA
tSU:STO
SDATA
tBUF
P
S
S
Figure 3. Timing Measurements
NOTE:
The NE1617 does not include the SMBUS timeout capability (tLOW:SEXT and tLOW:MEXT).
P
SL01204
1999 Mar 19
6
 

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