IS61SP12836 View Datasheet(PDF) - Integrated Circuit Solution Inc
Part Name
Description
Manufacturer
IS61SP12836 Datasheet PDF : 14 Pages
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IS61SP12836
PIN CONFIGURATION
119-pin PBGA (Top View) and 100-Pin LQFP
1
2
3
4
5
6
7
A
VCCQ A6
A4 ADSP A8
A16 VCCQ
B
NC
CE2
A3 ADSC A9
CE2
NC
C
NC
A7
A2
VCC A12
A15
NC
D
DQc1
NC
GND
NC
GND
NC DQb8
E
DQc2 DQc3 GND
CE
GND DQb6 DQb7
F
VCCQ DQc4 GND
OE
GND DQb5 VCCQ
G
DQc5 DQc6 BW3 ADV BW2 DQb4 DQb3
H
DQc7 DQc8 GND GW GND DQb2 DQb1
J
VCCQ VCC
NC
VCC
NC
VCC VCCQ
K
DQd1 DQd2 GND CLK GND DQa7 DQa8
L
DQd4 DQd3 BW4
NC
BW1 DQa5 DQa6
M
VCCQ DQd5
GND
BWE
GND
DQa4 VCCQ
N
DQd6 DQd7 GND
A1
GND DQa3 DQa2
P
DQd8 NC
GND
A0
GND
NC DQa1
R
NC
A5 MODE VCC
NC
A13
NC
T
NC
NC
A10 A11
A14
NC
ZZ
U
VCCQ NC
NC
NC
NC
NC VCCQ
DQPc
DQc1
DQc2
VCCQ
GND
DQc3
DQc4
DQc5
DQc6
GND
VCCQ
DQc7
DQc8
NC
VCC
NC
GND
DQd1
DQd2
VCCQ
GND
DQd3
DQd4
DQd5
DQd6
GND
VCCQ
DQd7
DQd8
DQPd
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1
80
2
79
3
78
4
77
5
76
6
75
7
74
8
73
9
72
10
71
11
70
12
69
13
68
14
67
15
66
16
65
17
64
18
63
19
62
20
61
21
60
22
59
23
58
24
57
25
56
26
55
27
54
28
53
29
52
30
51
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
DQPb
DQb8
DQb7
VCCQ
GND
DQb6
DQb5
DQb4
DQb3
GND
VCCQ
DQb2
DQb1
GND
NC
VCC
ZZ
DQa8
DQa7
VCCQ
GND
DQa6
DQa5
DQa4
DQa3
GND
VCC
DQa2
DQa1
DQPa
PIN DESCRIPTIONS
A0, A1
A2-A16
CLK
ADSP
ADSC
ADV
BW1-BW4
BWE
Synchronous Address Inputs. These
pins must tied to the two LSBs of the
address bus.
Synchronous Address Inputs
Synchronous Clock
Synchronous Processor Address
Status
Synchronous Controller Address
Status
Synchronous Burst Address Advance
Synchronous Byte Write Enable
Synchronous Byte Write Enable
Integrated Circuit Solution Inc.
SSR012-0B
GW
CE, CE2, CE2
OE
Synchronous Global Write Enable
Synchronous Chip Enable
Output Enable
DQa-DQd Synchronous Data Input/Output
MODE
Burst Sequence Mode Selection
VCC
+3.3V Power Supply
GND
Ground
VCCQ
Isolated Output Buffer Supply: +3.3V
ZZ
Snooze Enable
GNDQ
Isolated Output Buffer Ground
DQPa-DQPd Parity Data I/O
3
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