SmartHSF Mobile Modem Data Sheet
4.1.1 0x00 - Vendor ID Field
This 16-bit read-only field identifying the device manufacturer is loaded from the serial EEPROM after reset events. The value
is 14F1 for Conexant.
4.1.2 0x02 - Device ID Field
This 16-bit read-only field identifying the particular device is loaded from the serial EEPROM after reset events. The default
Device ID if serial EEPROM is not loaded is 0x1085.
4.1.3 0x04 - Command Register
Command Register
15 – 10
9
8
7
6
543
2
1
0
Reserved r/w r/w 0 r/w 0 0 0 r/w R/w r/w
r/w indicates the bit is read or write.
The Command Register bits are described in Table 4-2.
Bit
0
1
2
5-3
6
7
8
9
15-10
Table 4-2. Command Register
Description
Controls a device’s response to I/O Space accesses. A value of 0 disables the device response. A value
of 1 allows the device to respond to I/O Space accesses. The bit state is 0 after PCIRST# is deasserted.
Controls a device’s response to Memory Space accesses. A value of 0 disables the device response. A
value of 1 allows the device to respond to Memory Space accesses. The bit state is 0 after PCIRST# is
deasserted.
Controls a device’s ability to act as a master on the PCI Bus. A value of 0 disables the device from
generating PCI accesses. A value of 1 allows the device to behave as a bus master. The bit state is 0
after PCIRST# is deasserted.
Not Implemented.
This bit controls the device’s response to parity errors. When the bit is set, the device must take its
normal action when a parity error is detected. When the bit is 0, the device must ignore any parity errors
that it detects and continue normal operation. The bit state is 0 after PCIRST# is deasserted.
This bit is used to control whether or not a device does address/data stepping. This bit is read only from
the PCI interface. It is loaded from the serial EEROM after PCIRST# is deasserted.
This bit is an enable bit for the SERR# driver. A value of 0 disables the SERR# driver. A value of 1
enables the SERR# driver. The bit state is 0 after PCIRST# is deasserted.
This bit controls whether or not a master can do fast back-to-back transactions to different devices. A
value of 1 means the master is allowed to generate fast back-to-back transactions to different agents as
described in Section 3.4.2 of the PCI 2.1 specification. A value of 0 means fast back-to-back transactions
are only allowed to the same agent. The bit state is 0 after PCIRST# is deasserted.
Reserved
4-2
Conexant
100553B