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GE28F800B3B70 View Datasheet(PDF) - Intel

Part NameGE28F800B3B70 Intel
Intel Intel
Description3 Volt Advanced Boot Block Flash Memory
GE28F800B3B70 Datasheet PDF : 58 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
1.1
Product Overview
Intel provides the most flexible voltage solution in the flash industry, providing three discrete
voltage supply pins: VCC for read operation, VCCQ for output swing, and VPP for program and
erase operation. All 3 Volt Advanced Boot Block flash memory products provide program/erase
capability at 2.7 V or 12 V (for fast production programming) and read with VCC at 2.7 V. Since
many designs read from the flash memory a large percentage of the time, 2.7 V VCC operation can
provide substantial power savings.
The 3 Volt Advanced Boot Block flash memory products are available in either x8 or x16 packages
in the following densities: (see Section 6.0, “Ordering Information” on page 34 for availability.)
4-Mbit (4,194,304-bit) flash memory organized as 256 Kwords of 16 bits each or 512 Kbytes
of 8-bits each
8-Mbit (8,388,608-bit) flash memory organized as 512 Kwords of 16 bits each or 1024 Kbytes
of 8-bits each
16-Mbit (16,777,216-bit) flash memory organized as 1024 Kwords of 16 bits each or
2048 Kbytes of 8-bits each
32-Mbit (33,554,432-bit) flash memory organized as 2048 Kwords of 16 bits each
64-Mbit (67,108,864-bit) flash memory organized as 4096 Kwords of 16 bits each
The parameter blocks are located at either the top (denoted by -T suffix) or the bottom (-B suffix)
of the address map in order to accommodate different microprocessor protocols for kernel code
location. The upper two (or lower two) parameter blocks can be locked to provide complete code
security for system initialization code. Locking and unlocking is controlled by WP# (see Section
3.3, “Block Locking” on page 14 for details).
The Command User Interface (CUI) serves as the interface between the microprocessor or
microcontroller and the internal operation of the flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and timings necessary for program and erase
operations, including verification, thereby un-burdening the microprocessor or microcontroller.
The status register indicates the status of the WSM by signifying block erase or word program
completion and status.
The 3 Volt Advanced Boot Block flash memory is also designed with an Automatic Power Savings
(APS) feature which minimizes system current drain, allowing for very low power designs. This
mode is entered following the completion of a read cycle (approximately 300 ns later).
The RP# pin provides additional protection against unwanted command writes that may occur
during system reset and power-up/down sequences due to invalid system bus conditions (see
Section 3.6, “Power-Up/Down Operation” on page 16).
Section 3.0, “Principles of Operation” on page 7 gives detailed explanation of the different modes
of operation. Complete current and voltage specifications can be found in Section 4.4, “DC
Characteristics” on page 20. Refer to Section 4.5, “AC Characteristics —Read Operations” on
page 23 for read, program and erase performance specifications.
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