|Description||3 Volt Advanced Boot Block Flash Memory|
|GE28F640B3B110 Datasheet PDF : 58 Pages |
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
WP# = VIH for Block Unlocking
WP# = VIH unlocks all lockable blocks.
These blocks can now be programmed or erased.
Note that RP# does not override WP# locking as in previous Boot Block devices. WP# controls all
block locking and VPP provides protection against spurious writes. Table 8 defines the write
Table 8. Write Protection Truth Table for the Advanced Boot Block Flash Memory Family
Write Protection Provided
All Blocks Locked
VIH All Blocks Locked
VIH Lockable Blocks Locked
VIH All Blocks Unlocked
VPP Program and Erase Voltages
Intel® 3 Volt Advanced Boot Block products provide in-system programming and erase at 2.7 V.
For customers requiring fast programming in their manufacturing environment, 3 Volt Advanced
Boot Block includes an additional low-cost 12 V programming feature.
The 12 V VPP mode enhances programming performance during the short period of time typically
found in manufacturing processes; however, it is not intended for extended use. 12 V may be
applied to VPP during program and erase operations for a maximum of 1000 cycles on the main
blocks and 2500 cycles on the parameter blocks. VPP may be connected to 12 V for a total of 80
Warning: Stressing the device beyond these limits may cause permanent damage.
During read operations or idle times, VPP may be tied to a 5 V supply. For program and erase
operations, a 5 V supply is not permitted. The VPP must be supplied with either 2.7 V–3.6 V or
11.4 V–12.6 V during program and erase operations.
VPP = VIL for Complete Protection
The VPP programming voltage can be held low for complete write protection of all blocks in the
flash device. When VPP is below VPPLK, any program or erase operation will result in a error,
prompting the corresponding status register bit (SR.3) to be set.
Intel Flash devices have a tiered approach to power savings that can significantly reduce overall
system power consumption. The Automatic Power Savings (APS) feature reduces power
consumption when the device is selected but idle. If the CE# is deasserted, the flash enters its
standby mode, where current consumption is even lower. The combination of these features can
minimize memory power consumption, and therefore, overall system power consumption.
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