GE28F400B3BA90 View Datasheet(PDF) - Intel
Part Name
Description
Manufacturer
GE28F400B3BA90 Datasheet PDF : 58 Pages
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28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3.2.4
3.2.4.1
3.2.5
reading the status register to determine if an error occurred during that series. Clear the status
register before beginning another command or sequence. Note, again, that the Read Array
command must be issued before data can be read from the memory array.
Program Mode
Programming is executed using a two-write sequence. The Program Setup command (40H) is
written to the CUI followed by a second write which specifies the address and data to be
programmed. The WSM will execute a sequence of internally timed events to program desired bits
of the addressed location, then verify the bits are sufficiently programmed. Programming the
memory results in specific bits within an address location being changed to a “0.” If the user
attempts to program “1”s, the memory cell contents do not change and no error occurs.
The status register indicates programming status: while the program sequence executes, status bit 7
is “0.” The status register can be polled by toggling either CE# or OE#. While programming, the
only valid commands are Read Status Register, Program Suspend, and Program Resume.
When programming is complete, the Program Status bits should be checked. If the programming
operation was unsuccessful, bit SR.4 of the status register is set to indicate a program failure. If
SR.3 is set then VPP was not within acceptable limits, and the WSM did not execute the program
command. If SR.1 is set, a program operation was attempted on a locked block and the operation
was aborted.
The status register should be cleared before attempting the next operation. Any CUI instruction can
follow after programming is completed; however, to prevent inadvertent status register reads, be
sure to reset the CUI to read array mode.
Suspending and Resuming Program
The Program Suspend halts the in-progress program operation to read data from another location of
memory. Once the programming process starts, writing the Program Suspend command to the CUI
requests that the WSM suspend the program sequence (at predetermined points in the program
algorithm). The device continues to output status register data after the Program Suspend command
is written. Polling status register bits SR.7 and SR.2 will determine when the program operation
has been suspended (both will be set to “1”). tWHRH1/tEHRH1 specify the program suspend latency.
A Read Array command can now be written to the CUI to read data from blocks other than that
which is suspended. The only other valid commands while program is suspended, are Read Status
Register, Read Identifier, and Program Resume. After the Program Resume command is written to
the flash memory, the WSM will continue with the program process and status register bits SR.2
and SR.7 will automatically be cleared. After the Program Resume command is written, the device
automatically outputs status register data when read (see Appendix E for Program Suspend and
Resume Flowchart). VPP must remain at the same VPP level used for program while in program
suspend mode. RP# must also remain at VIH.
Erase Mode
To erase a block, write the Erase Set-up and Erase Confirm commands to the CUI, along with an
address identifying the block to be erased. This address is latched internally when the Erase
Confirm command is issued. Block erasure results in all bits within the block being set to “1.” Only
one block can be erased at a time. The WSM will execute a sequence of internally-timed events to
program all bits within the block to “0,” erase all bits within the block to “1,” then verify that all
bits within the block are sufficiently erased. While the erase executes, status bit 7 is a “0.”
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