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GE28F640B3B110 View Datasheet(PDF) - Intel

Part NameDescriptionManufacturer
GE28F640B3B110 3 Volt Advanced Boot Block Flash Memory Intel
Intel Intel
GE28F640B3B110 Datasheet PDF : 58 Pages
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28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Block Organization
The 3 Volt Advanced Boot Block is an asymmetrically-blocked architecture that enables system
integration of code and data within a single flash device. Each block can be erased independently
of the others up to 100,000 times. For the address locations of each block, see the memory maps in
Appendix C.
Parameter Blocks
The 3 Volt Advanced Boot Block flash memory architecture includes parameter blocks to facilitate
storage of frequently updated small parameters (e.g., data that would normally be stored in an
EEPROM). By using software techniques, the word-rewrite functionality of EEPROMs can be
emulated. Each device contains eight parameter blocks of 8-Kbytes/4-Kwords (8192 bytes/4,096
words) each.
Main Blocks
After the parameter blocks, the remainder of the array is divided into equal size main blocks
(65,536 bytes/32,768 words) for data or code storage. The 4-Mbit device contains seven main
blocks; 8-Mbit device contains fifteen main blocks; 16-Mbit flash has thirty-one main blocks;
32-Mbit has sixty-three main blocks; 64-Mbit has one hundred twenty-seven main blocks.
Principles of Operation
Flash memory combines EEPROM functionality with in-circuit electrical program and erase
capability. The 3 Volt Advanced Boot Block flash memory family utilizes a Command User
Interface (CUI) and automated algorithms to simplify program and erase operations. The CUI
allows for 100% CMOS-level control inputs and fixed power supplies during erasure and
When VPP < VPPLK, the device will only execute the following commands successfully: Read
Array, Read Status Register, Clear Status Register and Read Identifier. The device provides
standard EEPROM read, standby and output disable operations. Manufacturer identification and
device identification data can be accessed through the CUI. All functions associated with altering
memory contents, namely program and erase, are accessible via the CUI. The internal Write State
Machine (WSM) completely automates program and erase operations while the CUI signals the
start of an operation and the status register reports status. The CUI handles the WE# interface to the
data and address latches, as well as system status requests during WSM operation.
Bus Operation
3 Volt Advanced Boot Block flash memory devices read, program and erase in-system via the local
CPU or microcontroller. All bus cycles to or from the flash memory conform to standard micro-
controller bus cycles. Four control pins dictate the data flow in and out of the flash component:
CE#, OE#, WE# and RP#. These bus operations are summarized in Table 3.
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