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ISD1000A View Datasheet(PDF) - Information Storage Devices

Part NameDescriptionManufacturer
ISD1000A Single-Chip Voice Record/Playback Devices 16- and 20-Second Durations ISD
Information Storage Devices 
ISD1000A Datasheet PDF : 20 Pages
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ISD1000A Series
Product Data Sheets
Chip Enable Input (CE)
The CE pin is taken LOW to enable all Playback
and Record operations. The address inputs and
Playback/Record input (P/R) are latched by the
falling edge of CE. When CE is taken HIGH, the
ISD1000A is unselected, the P/R is HIGH, and the
auxiliary input is directed into the speaker ampli-
Playback/Record Input (P/R)
The P/R input is latched by the falling edge of the
CE pin. A HIGH level selects a Playback cycle
while a LOW level selects a Record cycle. For a
Record cycle, the address inputs provide the
starting address and recording continues until PD
or CE is pulled HIGH or an overflow is detected
-1 (i.e. the chip is full). When a Record cycle is termi-
nated by pulling PD or CE HIGH, an End-Of-Mes-
sage (EOM) marker is stored at the current
address in memory. For a Playback cycle, the
address inputs provide the starting address and
the device will play until an EOM marker is
encountered. The device can continue past an
EOM marker in an operational mode, or if CE is
held LOW in address mode. (See page 1-6 for
more Operational Modes).
End-Of-Message Output (EOM)
A non-volatile marker is automatically inserted at
the end of each recorded message. It remains
there until the message is recorded over. During
Playback, the EOM output pulses LOW for a
period of TEOM at the end of each message, or in
the event of a message overflow (device full).
In addition, the ISD1000A Series has an internal
VCC detect circuit to maintain message integrity
should VCC fall below 3.5V. In this case, EOM
goes LOW and the device is fixed in Playback-
only mode. The EOM marker provides a conve-
nient handshake signal for a processor, and also
facilitates the cascading of devices.
Microphone Input (MIC)
The microphone input transfers its signal to the
on-chip preamplifier. An on-chip Automatic Gain
Control (AGC) circuit controls the gain of this
preamplifier from -15 to 24 dB. An external micro-
phone should be AC coupled to this pin via a
series capacitor. The capacitor value, together
with the internal 10 Kohm resistance on this pin,
determines the low-frequency cutoff for the
ISD1000A Series passband. See ISD’s Applica-
tion Notes and Design Manual in this book for
additional information on low-frequency cutoff cal-
Microphone Reference Input (MIC REF)
The MIC REF input is the inverting input to the
microphone preamplifier. This provides a noise-
canceling or common-mode rejection input to the
device when connected to a differential micro-
Automatic Gain Control Input (AGC)
The AGC dynamically adjusts the gain of the
preamplifier to compensate for the wide range of
microphone input levels. The AGC allows the full
range of whispers to loud sounds to be recorded
with minimal distortion. The “attack” time is deter-
mined by the time constant of a 5 Kinternal
resistance and an external capacitor (C2) con-
nected from the AGC pin to VSSA analog ground.
The “release” time is determined by the time con-
stant of an external resistor (R2) and an external
capacitor (C2 on the schematic on page 1-17)
connected in parallel between the AGC Pin and
VSSA analog ground. Nominal values of 470 K
and 4.7 µF give satisfactory results, in most cases.
For AGC voltages of 1.5V and below, the pream-
plifier is at its maximum gain of 24 dB. Reduction
in preamplifier gain occurs for voltages of approx-
imately 1.8V.
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