|Номер в каталоге||ADC0831CCN|
Micro Linear Corporation
|Компоненты Описание||Serial I/O 8-Bit A/D Converters with Multiplexer Options|
|ADC0831CCN Datasheet PDF : 26 Pages |
ML2281, ML2282, ML2284, ML2288
The voltage applied to the reference input to these
converters defines the voltage span of the analog input
(the difference between VIN MAX and VIN MIN) over which
the 256 possible output codes apply. The devices can be
used in either ratiometric applications or in systems
requiring absolute accuracy. The reference pin must be
to a voltage source capable of driving the reference input
resistance, typically 10k. This pin is the top of a resistor
divider string used for the successive approximation
In a ratiometric system, the analog input voltage is
proportional to the voltage used for the A/D reference.
This voltage is typically the system power supply, so the
VREF pin can be tied to VCC. This technique relaxes the
stability requirements of the system reference as the analog
input and A/D reference move together maintaining the
same output code for a given input condition.
For absolute accuracy, where the analog input varies
between specific voltage limits, the reference pin can be
biased with a time and temperature stable voltage source.
The maximum value of the reference is limited to the VCC
supply voltage. The minimum value, however, can be quire
small to allow direct conversion of inputs with less than 5V
of voltage span. Particular care must be taken with regard to
noise pickup, circuit layout and system error voltage sources
when operating with a reduced span due to the increased
sensitivity of the converter.
ANALOG INPUTS AND SAMPLE/HOLD
An important feature of the ML2281 family of devices is that
they can be located at the source of the analog signal and
then communicate with a controlling µP with just a few
wires. This avoids bussing the analog inputs long distances
and thus reduces noise pickup on these analog lines.
However, in some cases, the analog inputs have a large
common mode voltage or even some noise present along
with the valid analog signal.
The differential input of these converters reduces the effects
of common mode input noise. Thus, if a common mode
voltage is present on both “+” and “–” inputs, such as 60Hz,
the converter will reject this common mode voltage since it
only converts the difference between “+” and “–” inputs.
The ML2281 family have a true sample and hold circuit
which samples both “+” and “–” inputs simultaneously. This
simultaneous sampling with a true S/H will give common
mode rejection and AC linearity performance that is superior
to devices where the two input terminals are not sampled at
the same instant and where true sample and hold capability
does not exist. Thus, the ML2281 family of devices can
reject AC common mode signals from DC-50kHz as well as
maintain linearity for signals from DC-50kHz.
The signal at the analog input is sampled during the interval
when the sampling switch is closed prior to conversion
start. The sampling window (S/H acquisition time) is 1/2
CLK period wide and occurs 1/2 CLK period before DO
goes from high impedance to active low state. When the
sampling switch closes at the start of the S/H acquisition
time, 8pF of capacitance is thrown onto the analog input.
1/2 CLK period later, the sampling switch is opened and the
signal present at the analog input is stored. Any error on the
analog input at the end of the S/H acquisition time will
cause additional conversion error. Care should be taken to
allow adequate charging or settling time from the source.
If more charging or settling time is needed to reduce these
analog input errors, a longer CLK period can be used.
The ML2281X family has improved latchup immunity.
Each analog input has dual diodes to the supply rails, and
a minimum of ±25mA (±100mA typically) can be injected
into each analog input without causing latchup.
Signal-to-noise ration (SNR) is the measured signal-to-noise
at the output of the converter. The signal is the RMS
magnitude of the fundamental. Noise is the RMS sum of all
the nonfundamental signals up to half the sampling
frequency. SNR is dependent on the number of quantization
levels used in the digitization process; the more levels, the
smaller the quantization noise. The theoretical SNR for a
sine wave is given by
SNR = (6.02N + 1.76)dB
where N is the number of bits. Thus for ideal 8-bit converter,
SNR = 49.92dB.
Harmonic distortion is the ratio of the RMS sum of
harmonics to the fundamental. Total harmonic distortion
(THD) of the ML2281 Series is defined as
where V1 is the RMS amplitude of the fundamental and V2,
V3, V4, V5 are the RMS amplitudes of the individual
With inputs consisting of sine waves at two frequencies, fA
and fB, any active device with nonlinearities will create
distortion products, of order (m + n), at sum and difference
frequencies of mfA + nfB, where m, n = 0, 1, 2, 3… .
Intermodulation terms are those for which m or n is not
equal to zero. The (IMD) intermodulation distortion
specification includes the second order terms (fA + fB) and
(fA – fB) and the third order terms (2fA + fB), (2fA – fB),
(fA + 2fB) and (fA – 2fB) only.
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