M38861MEA-XXXFS View Datasheet(PDF) -
M38861MEA-XXXFS Datasheet PDF : 0 Pages
| |||
MITSUBISHI MICROCOMPUTERS
3886 Group
TIMING REQUIREMENTS
Table 38 Timing requirements (1)
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
tW(RESET)
tC(XIN)
tWH(XIN)
tWL(XIN)
tC(XCIN)
tWH(XCIN)
tWL(XCIN)
tC(CNTR)
tWH(CNTR)
tWL(CNTR)
tWH(INT)
Reset input “L” pulse width
Main clock input cycle time
Main clock input “H” pulse width
Main clock input “L” pulse width
Sub-clock input cycle time
Sub-clock input “H” pulse width
Sub-clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0, INT1, INT20, INT30, INT40, INT21, INT31, INT41
input “H” pulse width
tWL(INT)
INT0, INT1, INT20, INT30, INT40, INT21, INT31, INT41
input “L” pulse width
tC(SCLK1)
tWH(SCLK1)
tWL(SCLK1)
tsu(RxD-SCLK1)
th(SCLK1-RxD)
tC(SCLK2)
tWH(SCLK2)
tWL(SCLK2)
tsu(SIN2-SCLK2)
th(SCLK2-SIN2)
Serial I/O1 clock input cycle time (Note)
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
Serial I/O1 input setup time
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 input setup time
Serial I/O2 input hold time
Note : When bit 6 of address 001A16 is “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A16 is “0” (UART).
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Limits
Unit
Min.
Typ.
Max.
2
µs
100
ns
40
ns
40
ns
20
µs
5
µs
5
µs
200
ns
80
ns
80
ns
80
ns
80
ns
800
ns
370
ns
370
ns
220
ns
100
ns
1000
ns
400
ns
400
ns
200
ns
200
ns
94
|
|
Share Link: 