M38861FFA-XXXFS View Datasheet(PDF) -

MITSUBISHI MICROCOMPUTERS

3886 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

PIN DESCRIPTION

Table 1 Pin description (1)

Pin

Name

VCC, VSS Power source

CNVSS

CNVSS input

VREF

AVSS

RESET

XIN

Reference voltage

Analog power source

Reset input

Clock input

XOUT

Clock output

P00/P3REF

I/O port P0

P01–P07

P10–P17 I/O port P1

P20–P27 I/O port P2

P30/PWM00

P31/PWM10

I/O port P3

P32–P37

Functions

Function except a port function

•Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.

•In the flash memory version, apply voltage of 4.0 V – 5.5 V to Vcc, and 0 V to Vss

•This pin controls the operation mode of the chip.

•Normally connected to VSS.

•If this pin is connected to Vcc, the internal ROM is inhibited and an external memory is accessed.

•In the flash memory version, connected to VSS.

•In the EPROM version or the flash memory version, this pin functions as the VPP power source input pin.

•Reference voltage input pin for A-D and D-A converters.

•Analog power source input pin for A-D and D-A converters.

•Connect to VSS.

•Reset input pin for active “L”.

•Input and output pins for the clock generating circuit.

•Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set

the oscillation frequency.

•When an external clock is used, connect the clock source to the XIN pin and leave the XOUT

pin open.

•8-bit CMOS I/O port.

•Comparator reference power source

•I/O direction register allows each pin to be individually input pin

programmed as either input or output.

•When the external memory is used, these pins are used as the address bus.

•CMOS compatible input level.

•CMOS 3-state output structure or N-channel open-drain output structure.

•8-bit CMOS I/O port.

•I/O direction register allows each pin to be individually programmed as either input or output.

•When the external memory is used, these pins are used as the address bus.

•CMOS compatible input level.

•CMOS 3-state output structure or N-channel open-drain output structure.

•8-bit CMOS I/O port.

•I/O direction register allows each pin to be individually programmed as either input or output.

•When the external memory is used, these pins are used as the data bus.

•CMOS compatible input level.

•CMOS 3-state output structure.

•P24 to P27 (4 bits) are enabled to output large current for LED drive (only in single-chip mode).

•8-bit CMOS I/O port.

•I/O direction register allows each pin to be individually

programmed as either input or output.

•When the external memory is used, these pins are

used as the control bus.

•Key-on wake-up input pin

•Comparator input pin

•PWM output pin

•CMOS compatible input level.

•Key-on wake-up input pin

•CMOS 3-state output structure.

•Comparator input pin

•These pins function as key-on wake-up and compara-

tor input.

•These pins are enabled to control pull-up.

5

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