M38862E4A-XXXFS View Datasheet(PDF) -
M38862E4A-XXXFS Datasheet PDF : 0 Pages
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Table 48 Multi-master I2C-BUS bus line characteristics
Symbol
Parameter
tBUF
Bus free time
tHD;STA
Hold time for START condition
tLOW
Hold time for SCL clock = “0”
tR
Rising time of both SCL and SDA signals
tHD;DAT
Data hold time
tHIGH
Hold time for SCL clock = “1”
tF
Falling time of both SCL and SDA signals
tSU;DAT
Data setup time
tSU;STA
Setup time for repeated START condition
tSU;STO
Setup time for STOP condition
Note: Cb = total capacitance of 1 bus line
MITSUBISHI MICROCOMPUTERS
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Standard clock mode High-speed clock mode
Min.
Max.
Min.
Max.
Unit
4.7
1.3
µs
4.0
0.6
µs
4.7
1.3
µs
1000 20+0.1Cb 300
ns
0
0
0.9
µs
4.0
0.6
µs
300 20+0.1Cb 300
ns
250
100
ns
4.7
0.6
µs
4.0
0.6
µs
SDA
tBUF
tLOW
tR
tF
SCL P
S
tHD:STA
Sr
tHD:STA
tHD:DAT
tHIGH
tsu:DAT
tsu:STA
Fig. 89 Timing diagram of multi-master I2C-BUS
tsu:STO
P
S : START condition
Sr: RESTART condition
P : STOP condition
105
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