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Part Name
Description
ZPSD301-B-15J View Datasheet(PDF) - Waferscale Integration
Part Name
Description
Manufacturer
ZPSD301-B-15J
Programmable system device, 18 PLD inputs, EPROM 512K, bus width x8 or x16, 5V, 90ns
Waferscale Integration
ZPSD301-B-15J Datasheet PDF : 88 Pages
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PSD3XX Family
Figure 21. Timing of 8-Bit Multiplexed Address/Data Bus Using RD, WR (PSD3X2/3X3)
CSI/A19
as CSI
Direct
(1)
PAD Input
Multiplexed
(2)
Inputs
A0/AD0-
A7/AD7
Active High
ALE
Active Low
ALE
RD/E/DS as RD
BHE/PSEN
as PSEN
WR/V
PP
or
RW as WR
Any of
PA0-PA7
as I/O Pin
Any of
PB0-PB7
as I/O Pin
Any of
PA0-PA7 Pins
as Address
Outputs
READ CYCLE
32
7
STABLE INPUT
6
6
ADDRESS A
2
3
1
10
DATA VALID
9
4
13
8
12
5
18
19
INPUT
INPUT
23
ADDRESS A
WRITE CYCLE
32
15
32
STABLE INPUT
14
14
ADDRESS B
2
3
1
11
DATA
IN
17
16
36
13
12A
20
OUTPUT
OUTPUT
23
ADDRESS B
See referenced notes on page 64
45
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