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T7570-ML2-TR View Datasheet(PDF) - Agere -> LSI Corporation

Part Name
Description
Manufacturer
T7570-ML2-TR
Agere
Agere -> LSI Corporation Agere
T7570-ML2-TR Datasheet PDF : 28 Pages
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T7570 Programmable PCM Codec
with Hybrid-Balance Filter
Data Sheet
October 1996
Functional Description (continued)
Programmable Functions (continued)
Table 7. Time-Slot and Port Assignment Instruction
Bit Number and Name
7
6
5
4
3
2
1
0
EN PS T5*
T4
T3
T2
T1
T0
Function
0
0
X
X
X
X
X
X Disable DX0 Output (transmit instruction)
Disable DR0 Input (receive instruction)
0
1
X
X
X
X
X
X Disable DX1 Output (transmit instruction)
Disable DR1 Input (receive instruction)
1
0 Assign One Binary-coded Time Slot from 0—63 Enable DX0 Output (transmit instruction)
Enable DR0 Input (receive instruction)
1
1 Assign One Binary-coded Time Slot from 0—63 Enable DX1 Output (transmit instruction)
Enable DR1 Input (receive instruction)
* T5 is the MSB of the time-slot assignment.
Transmit Gain Instruction Byte 2
The transmit gain can be programmed in 0.1 dB steps
from –0.4 dB to +19.0 dB by writing to the transmit gain
register as defined in Tables 2 and 8. This corresponds
to a range of 0 dBm0 levels at VFXI between
0.811 Vrms and 0.087 Vrms (equivalent to +0.4 dBm to
–19.0 dBm into 600 ).
To set transmit gain, determine the gain required of the
codec in order to achieve the overall desired transmis-
sion level point (TLP) at the PCM interface (usually
0 dBm or –2 dBm).
In order for the internal hybrid-balance circuitry to be
effective, the portion of VFRO returned to the codec
analog input must be between –2.5 dB to –10.25 dB of
the VFRO output. For instance, if a SLIC presents a
–6 dBm signal to VFXI when VFRO produces 0 dBm,
good hybrid balance can be achieved. If the returned
signal requires amplification to satisfy this requirement,
then an additional op amp in the transmit path would be
required. The T7570 will accommodate the phase
inversion. A spare op amp is provided in some Lucent
SLICs.
Once the codec gain is chosen, determine what signal
level at VFXI would provide the desired TLP output at
Dx. For our example of +6 dB gain (Gx) providing a
0 dBm TLP and working backwards from Dx, take the
antilog of minus 6 dB divided by 20 and multiply by the
0.7746 reference level to obtain the signal level at VFXI
in Vrms. As follows:
(1)
antilog10 (–Gx / 20) * 0.7746 = Vrms
Finally, convert the signal level to a decimal number (n)
using the following formula:
(2)
200 * log10 (Vrms / 0.08592) = n
Round n to the nearest integer and convert to binary.
This is the code required by byte 2 of this instruction.
Some examples are given in Table 8.
Table 8. Byte 2 of Transmit Gain Instructions
Bit Number
76543210
00000000
00000001
00000010
1 0 1 1 1 1 1 1*
11000010
1 1 0 0 0 0 1 1
0 dBm0 Test Level (Vrms)
at VFXI
No Output
0.087
0.088
0.7746
0.802
0.811
* 0 dB path gain setting.
†Programming values greater than those listed in this table are
permitted. However, large signals may cause overload.
Receive Gain Instruction Byte 2
The receive gain can be programmed in 0.1 dB steps
from –17.3 dB to +2.1 dB by writing to the receive gain
register as defined in Tables 2 and 9. This corresponds
to a range of 0 dBm0 levels at VFRO between
0.987 Vrms and 0.106 Vrms (equivalent to +2.1 dBm to
–17.3 dBm into 600 ).
10
Lucent Technologies Inc.
 

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