ADC180CA View Datasheet(PDF) - Thaler Corporation
Part Name
Description
Manufacturer
ADC180CA Datasheet PDF : 7 Pages
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THEORY OF OPERATION
Vhi
Vlow
Auto Zero Switch
39
40
Transadmittance
Amplifier
34
35
Charge Balance
Modulator
3
Duty Cycle
Test Point
Crystal
Clock
Data
Output
ï 13
.
.
.
20
Output
Buffer
ï
Microprocessor
21
29
22
23 24
26
20MHz clock output
FIGURE 1. BLOCK DIAGRAM
Output Enable
Auto Data
Zero Request
Status
Lines
The ADC180 uses a differential input to improve
accuracy. To measure single source voltages,
Vlow should be connected to the ground point of the
source voltage to be measured. In figure 1, the
switch is shown in the normal operating mode
connecting Vhi and Vlow to the differential input of
the transadmittance amplifier. For an autozero
cycle, Vhi is disconnected and the input to the
amplifier is shorted.
The charge balance modulator (figure 2) uses a
proprietary patented architecture to achieve the
high accuracy of the ADC180 without any error
correction method other than autozero. This
enables the converter to sample the output of the
transadmittance amplifier continuously at a
sampling rate of 20 MHz. This is important for
applications like inertial guidance systems where
t2
∫t1 Vinp ⋅ dt
must be measured without any loss of time
increments. The output of the charge balance
modulator is in the form of a pulse width
modulation signal. The internal microprocessor
provides all control functions and digital signal
processing.
The converter also has an internal crystal clock to
avoid phase jitter errors and a tristate output
buffer for easy interface with bus based systems.
For the data output timing see figures 5 and 6.
The conversion result between two consecutive
data request inputs at times t1 and t2 is
mathematically represented by the equation
∫ Viav
=
t2
1
− t1
t2
t1 Vinp ⋅ dt
The converter provides two 32 bit data words with
the first word containing t2-t1 and the second word
containing
t2
∫t1 Vinp ⋅ dt
IIN
∫
Bilevel
Comparator
Bidirectional
Curent
Source
Direction
Switch
Data
Output
Figure 2. Patented Charge Balance Modulator
ADC180DS REV H MAR 00
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