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LC75281E View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LC75281E
SANYO
SANYO -> Panasonic SANYO
LC75281E Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
LC75281E
Continued from preceding page.
Pin No.
10
11
12
13
14
15
16
17
18
19
20, 24, 29
56, 57
23
21
22
27
26
25
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
58
59
61
62
55
54
52
51
60
53
63
50
28
Pin
LHMC2
LHMC1
LHMC4
LHMC3
LHMC5
LHC2
LHC1
LHC4
LHC3
LHC5
Left channel high mid band control block.
External capacitor connections.
Left channel high band control block.
External capacitor connections.
Function
NC
Vref
VSS
VDD
CE
DI
CL
RLC2
RLC1
RLC4
RLC3
RLC5
RLMC2
RLMC1
RLMC4
RLMC3
RLMC5
RHMC2
RHMC1
RHMC4
RHMC3
RHMC5
RHC2
RHC1
RHC4
RHC3
RHC5
LCUT2
LCUT1
LBOOS2
LBOOS1
RCUT2
RCUT1
RBOOS2
RBOOS1
LIN
RIN
LOUT
ROUT
TEST
Unused pins. These pins must be either left open or connected to VSS.
Internal operational amplifier reference voltage generator outputs.
Several capacitors with values of about 10 µF must be connected with this pin to reduce ripple.
Power supply.
These pins must be connected to the stipulated power supply.
Chip enable input. Data is written to the internal latch and the analog switches operate when this pin
changes from high to low. Data transfer is enabled when this pin is high.
Serial data and clock inputs for IC control
Right channel low band control block.
External capacitor connections.
Right channel low mid band control block.
External capacitor connections.
Right channel high mid band control block.
External capacitor connections.
Right channel high band control block.
External capacitor connections.
Internal filter DC offset voltage exclusion capacitor connections.
Capacitors of about 10 µF must be connected between pins 61 and 62, and between pins 63 and 64.
(These are for the left channel block.)
Internal filter DC offset voltage exclusion capacitor connections.
Capacitors of about 10 µF must be connected between pins 51 and 52, and between pins 49 and 50.
(These are for the right channel block.)
Left channel audio signal input (Must be driven with a low load capacitance.)
Right channel audio signal input (Must be driven with a low load capacitance.)
Left channel audio signal output (Must be received with a low load capacitance.)
Right channel audio signal output (Must be received with a low load capacitance.)
IC test pin.
This pin must be left open when not used for IC test.
No. 5913-4/10
 

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