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DM74AS652WM View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
DM74AS652WM
Fairchild
Fairchild Semiconductor Fairchild
DM74AS652WM Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
DM74AS652 Switching Characteristics
Symbol
Parameter
Conditions
From
To
Min
fMAX
Maximum Clock Frequency
VCC = 4.5V to 5.5V
90
tPLH
Propagation Delay Time
R1 = R2 = 500
LOW-to-HIGH Level Output
CL = 50 pF
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
2
CBA or CAB A or B
2
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
2
A or B
B or A
1
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
2
SBA or SAB A or B
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
(Note 5)
2
tPZH
Output Enable Time
2
to HIGH Level Output
tPZL
Output Enable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output
3
Enable GBA A
2
tPLZ
Output Disable Time
2
from LOW Level Output
tPZH
Output Disable Time
3
to HIGH Level Output
tPZL
Output Disable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output
3
Enable GAB B
2
tPLZ
Output Disable Time
2
from LOW Level Output
Note 5: These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Max
8.5
Units
MHz
ns
9
ns
9
ns
7
ns
11
ns
9
ns
10
ns
16
ns
9
ns
9
ns
11
ns
16
ns
10
ns
11
ns
www.fairchildsemi.com
6
 

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