28222-13 View Datasheet(PDF) - Conexant Systems

Part Name

Description

Manufacturer

28222-13

ATM Transmitter/Receiver with UTOPIA Interface

Conexant Systems 

1.0 Product Description

1.5 FIFO Port/UTOPIA Interface

CN8223

ATM Transmitter/Receiver with UTOPIA Interface

1.5 FIFO Port/UTOPIA Interface

The CN8223 FIFO Port/UTOPIA interface is the data connection for the host

system. Figure 1-4 illustrates the functions in this block. This block has two

modes for interfacing with ATM cells: four FIFO ports or one ATM Forum Level

1 Compliant UTOPIA port.

Figure 1-4. FIFO Port/UTOPIA Interface Block

ATM Cell

Processing

Block

Rx VPI/VCI

Screening

Port 0 Ctrl

4-Port

FIFO

Data

Interface

Port 1 Ctrl

Port 2 Ctrl

Port 3 Ctrl

UTOPIA UTOPIA Ctrl

Interface

and

4-Cell

9

Buffers

9

FCTRL_OUT[16:0]

FCTRL_IN[7:0]

FDAT_IN

FDAT_OUT

ATM Layer

Cell Processing

FIFO

FIFO port/UTOPIA interface block features include the following:

• Four byte-wide FIFO ports

• UTOPIA port with four-cell buffer

• Port rate and priority control

• Idle cell TX/Rx

• Per-port ATM header screening

• 48-, 52-, 53-, and 57-octet cell modes

1.5.1 UTOPIA Mode

UTOPIA mode implements a single 25 MHz, 8-bit plus parity bidirectional

interface with four cells of internal FIFO in both directions. Parity is optional.

When the UTOPIA interface mode is used, only 53-octet output is available.

1.5.2 FIFO Ports

Cells are routed to one of four output ports if a match to that port’s programmable

header value is made. This can be used to route received VCI/VPIs to a chosen

port. Four modes are available for FIFO port cell output:

• A test mode writes the entire 57-octet PLCP slot to the FIFO interface.

• A 53-octet mode writes the 53-octet ATM cell to the FIFO interface.

• A 52-octet mode writes the ATM cell without the HEC octet to the FIFO

interface.

• A final mode delivers 48-octet cell payloads to the FIFO interface.

1-10

Conexant

100046C

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