M1A3P400-PQ208YES View Datasheet(PDF) - Microsemi Corporation

Part Name

Description

Manufacturer

M1A3P400-PQ208YES

(A3Pxxx) ProASIC3 Flash Family FPGAs with Optional Soft ARM Support

Microsemi Corporation 

ProASIC3 DC and Switching Characteristics

Temperature and Voltage Derating Factors

Table 2-6 • Temperature and Voltage Derating Factors for Timing Delays

(normalized to TJ = 70°C, VCC = 1.425 V)

Array Voltage VCC

(V)

–40°C

Junction Temperature (°C)

0°C

25°C

70°C

1.425

0.88

0.93

0.95

1.00

1.500

0.83

0.88

0.90

0.95

1.575

0.80

0.84

0.87

0.91

85°C

1.02

0.96

0.93

100°C

1.04

0.98

0.94

Calculating Power Dissipation

Quiescent Supply Current

Table 2-7 • Quiescent Supply Current Characteristics

A3P015 A3P030 A3P060 A3P125 A3P250 A3P400 A3P600 A3P1000

Typical (25°C)

2 mA 2 mA 2 mA 2 mA 3 mA 3 mA 5 mA 8 mA

Max. (Commercial) 10 mA 10 mA 10 mA 10 mA 20 mA 20 mA 30 mA 50 mA

Max. (Industrial)

15 mA 15 mA 15 mA 15 mA 30 mA 30 mA 45 mA 75 mA

Note: IDD Includes VCC, VPUMP, VCCI, and VMV currents. Values do not include I/O static

contribution, which is shown in Table 2-11 and Table 2-12 on page 2-8.

Power per I/O Pin

Table 2-8 • Summary of I/O Input Buffer Power (Per Pin) – Default I/O Software Settings

Applicable to Advanced I/O Banks

Single-Ended

VMV (V)

Static Power

PDC2 (mW) 1

Dynamic Power

PAC9 (µW/MHz) 2

3.3 V LVTTL / 3.3 V LVCMOS

3.3

–

16.22

3.3 V LVCMOS Wide Range3

3.3

–

16.22

2.5 V LVCMOS

2.5

–

5.12

1.8 V LVCMOS

1.8

–

2.13

1.5 V LVCMOS (JESD8-11)

1.5

–

1.45

3.3 V PCI

3.3

–

18.11

3.3 V PCI-X

3.3

–

18.11

Differential

LVDS

2.5

2.26

1.20

LVPECL

3.3

5.72

1.87

Notes:

1. PDC2 is the static power (where applicable) measured on VMV.

2. PAC9 is the total dynamic power measured on VCC and VMV.

3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B

specification.

2-6

Revision 13

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