89LPC933 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

89LPC933

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

NXP Semiconductors. 

NXP Semiconductors

P89LPC933/934/935/936

8-bit microcontroller with accelerated two-clock 80C51 core

8.21 I2C-bus serial interface

The I2C-bus uses two wires (SDA and SCL) to transfer information between devices

connected to the bus, and it has the following features:

• Bidirectional data transfer between masters and slaves

• Multi master bus (no central master)

• Arbitration between simultaneously transmitting masters without corruption of serial

data on the bus

• Serial clock synchronization allows devices with different bit rates to communicate via

one serial bus

• Serial clock synchronization can be used as a handshake mechanism to suspend and

resume serial transfer

• The I2C-bus may be used for test and diagnostic purposes.

A typical I2C-bus configuration is shown in Figure 15. The P89LPC933/934/935/936

device provides a byte-oriented I2C-bus interface that supports data transfers up to

400 kHz.

I2C-bus

RP

RP

P1.3/SDA P1.2/SCL

P89LPC935

OTHER DEVICE

WITH I2C-BUS

INTERFACE

Fig 15. I2C-bus configuration

SDA

SCL

OTHER DEVICE

WITH I2C-BUS

INTERFACE

002aab082

P89LPC933_934_935_936

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 8 — 12 January 2011

© NXP B.V. 2011. All rights reserved.

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